Samsung and TSMC team up with NVIDIA on custom HBM memory chips for AI

NVIDIA’s push for faster, more energy-efficient AI computing is reaching deeper into the supply chain for advanced memory. A market report says Samsung Electronics and TSMC are collaborating with NVIDIA on custom high-bandwidth memory, or HBM, chips designed to support NVIDIA’s AI systems.

HBM is a type of stacked memory used in modern AI accelerators because it can move large amounts of data quickly between the processor and memory. The report specifically points to co-design work on what it calls an “NVHBM memory base die,” suggesting NVIDIA is not only choosing an HBM supplier, but participating in how the underlying memory architecture is built.

According to the same reporting, the collaboration involves both Samsung and TSMC, reflecting a split that is common in advanced semiconductors: one company contributes a key memory design and process, while a foundry partner performs manufacturing steps for the complex chips. For NVIDIA, that kind of integration matters because AI performance depends not only on compute capacity but also on memory bandwidth and latency.

The report does not provide additional specifics such as target speeds, capacity, or whether the effort is tied to a particular NVIDIA product cycle. It also does not detail where the design work ends and which fabrication steps are handled by each partner, beyond describing a joint effort that includes Samsung and TSMC.

For NVIDIA, custom memory is part of a broader strategy to differentiate its AI platform rather than treat memory as a commodity component. AI workloads are often memory- and bandwidth-sensitive, particularly for model training and large-scale inference where the system must feed the GPU with data quickly enough to avoid compute stalls.

The collaboration also highlights how HBM supply and design capabilities have become a strategic battleground across the semiconductor industry. As AI accelerators proliferate, HBM demand has grown, and companies have looked for ways to secure performance gains and tighter integration with the accelerators that use the memory.

Still, what is publicly known is limited. The report does not disclose engineering documentation, named chip specifications, commercial volumes, or the timeline for ramping production. NVIDIA did not provide details in the material reviewed for this story, and the report does not cite a company statement with technical figures.

What to watch next is whether NVIDIA or its partners add further detail through product announcements, investor communications, or technical disclosures, including any mention of NVHBM targets, manufacturing progress, and how the memory design maps to NVIDIA’s latest AI hardware roadmap.